Welcome to HPES!

Hello! Thanks for taking a look at the EEE4120F High Performance Embedded Systems (HPES) website. All the resources on this site are available for free use and reuse without written consent from the lecturer. If you are using any of the resources for a formal course or lectures then I would appreciate if you acknowledged the source, see the EEE4120F Resource Use Policy for details.

Objective of this Course

The objective of this course is to develop a practical and theoretical understanding of High Performance Embedded Systems (HPES), specifically focusing on the intersection of parallel software and hardware acceleration.

Modern embedded systems are no longer limited to simple microcontrollers; they increasingly rely on Heterogeneous Computing architectures that combine standard processors with specialized hardware, such as Field Programmable Gate Arrays (FPGAs) and System-on-Chips (SoCs). This course introduces students to this co-design landscape.

Key areas of focus for this course include:

  • Parallel Computing: Techniques for maximizing performance on multicore and cluster-based systems using standards like MPI and OpenMP.

  • Hardware Acceleration: An introduction to Hardware Description Languages (HDL), specifically Verilog, to design custom digital circuits and accelerators.

  • Reconfigurable Computing: Understanding the architecture of FPGAs and how to map algorithms to hardware logic for significant speedups.

Note on Scope: While this course utilizes HDL and touches on SoC concepts, it is not a full VLSI or ASIC design course. Instead, it provides the essential foundation and relevant skills needed to prototype high-performance systems — as in skills that are directly transferable to advanced studies or industry roles in FPGA engineering and SoC development.

Coursework involves a mix of software-based parallel programming labs and hardware-based HDL design practicals. The course also addresses ECSA Graduate Attribute 2 (Problem Solving) through a specific Conceptual Assignment.

Course Information

SAQA Credits 16 Credits
Prerequisites EEE3096/5S
Lecture Times and Venues:
For this year, we're having a combination of lectures, pracs or some computer-based activities during lecture slots, as well as working through problems and occasional quizzes during the assigned lecture times. Attending class meetings is optional, but do try to attend quizzes and tests that are held in lectures, although the quizzes are schedule and announced ahead of time, and they are generally held at the start of the lecture (after which there may be occasionally be peer-marking and going over the quiz solutions). As will be explain in Lecture 1, you can apply for moving test marks (with the exception of the GA2 test) to the exam (e.g. if you will not be able to attend tests). This year, the course has a sequence of weekly 'Learning' tasks and objectives, some 'seminar style' sessions to discuss topics and theories, which are aimed to assist students in the assigned reading tasks. Graduate Attribute Outcome 2 (GA2) requirements are part of this course; there is a GA2 assignment, that includes reading tasks and problem-solving activities, involved for this. You need to satisfactorily complete the GA2 assignment and any related testing in order to receive DP for this course.
NOTE while attendance of classes is optional, students must plan their study to make sure that their learning is 'synched' with the various assessments involved (these assessments include assignment handends and tests). Tests and other assessments which will be announced in good time to assist you planning and time management.
Weekly Routine
Lectures:
Monday 14h00-16h00:
Lecture Session; Assignment / Practical discussion. Seminar/Tools review. See announcement of 'Learning' plans and tasks for the week.
Friday 10h00-12h00: Possible additional venue can be booked if more space needed. Quiz will be held during start of this period (tests and quizzes will be announced a week before).
Prac Times and Venues (tutor availability)

Sometimes a test may be held in the Thursday prac slot; if so that will be announced well in advance.
Pracs can be done on your own pc. Aim to do pracs as a group of two (try to do this from Prac1 this year). Plan with your team partner when to meet to work on pracs. Thursday session is an opportunity for tutor support. Prac times are otherwise flexible, you can work where you like.
Thursday 16h00 - 18h00: main prac session. NB: bring your own laptop to the venue.
DP Requirement Overall class average of 40%
Pass GA2 assignment and test.
Final Mark Weighting See course handout
Course Handout (check on Amathuba for latest version) OCW EEE4120F Handout

preparatory Resources

To succeed in this course, you should be comfortable with the following tools and concepts. If you are rusty, please review the resources linked below preferably before the course begins.

  • C / C++ Programming: Essential for the MPI and software-based practicals. You should be comfortable with pointers, memory management, and compiling code via command line. Here are some tutorials that can help:
  • Linux & Command Line: The labs for this course (and indeed industry as well) rely heavily on Linux environments. You should know how to navigate the terminal, run scripts, and use tools like make and gcc. If you aren't familiar with Linux, try these asap:
    • Command Line for Beginners (Ubuntu flavor)
    • The Unix Shell (Software Carpentry - that's a very useful site for software developers that use Linux/Unix and want to fit in with how the gurus do things)
  • Digital Logic & HDL: We will use Verilog to design hardware. A solid grasp of digital logic (gates, flip-flops, state machines) is assumed. Combination logic circuits would have been covered in your 2nd year (in EEE2046F). But you would probably not have covered any HDL coding; here are some suggested tutorials for that (in 2025 and later years you are not expected to have prior HDL coding experience, it will be taught in this course).

Related Websites

For more information, refer to these websites: