VADER Project Status (05/17/2016 - 12:39:56)
Project File: YODAProjectCode.xise Parser Errors: No Errors
Module Name: VADER Implementation State: Programming File Generated
Target Device: xc7a100t-3csg324
  • Errors:
 
Product Version:ISE 14.7
  • Warnings:
 
Design Goal: Balanced
  • Routing Results:
All Signals Completely Routed
Design Strategy: Xilinx Default (unlocked)
  • Timing Constraints:
X 1 Failing Constraint
Environment: System Settings
  • Final Timing Score:
4562483  (Timing Report)
 
Device Utilization Summary [-]
Slice Logic UtilizationUsedAvailableUtilizationNote(s)
Number of Slice Registers 10,537 126,800 8%  
    Number used as Flip Flops 9,614      
    Number used as Latches 0      
    Number used as Latch-thrus 0      
    Number used as AND/OR logics 923      
Number of Slice LUTs 10,231 63,400 16%  
    Number used as logic 9,215 63,400 14%  
        Number using O6 output only 7,169      
        Number using O5 output only 344      
        Number using O5 and O6 1,702      
        Number used as ROM 0      
    Number used as Memory 530 19,000 2%  
        Number used as Dual Port RAM 0      
        Number used as Single Port RAM 0      
        Number used as Shift Register 530      
            Number using O6 output only 466      
            Number using O5 output only 64      
            Number using O5 and O6 0      
    Number used exclusively as route-thrus 486      
        Number with same-slice register load 478      
        Number with same-slice carry load 8      
        Number with other load 0      
Number of occupied Slices 2,733 15,850 17%  
Number of LUT Flip Flop pairs used 10,518      
    Number with an unused Flip Flop 3,335 10,518 31%  
    Number with an unused LUT 287 10,518 2%  
    Number of fully used LUT-FF pairs 6,896 10,518 65%  
    Number of unique control sets 19      
    Number of slice register sites lost
        to control set restrictions
48 126,800 1%  
Number of bonded IOBs 24 210 11%  
    Number of LOCed IOBs 24 24 100%  
Number of RAMB36E1/FIFO36E1s 0 135 0%  
Number of RAMB18E1/FIFO18E1s 0 270 0%  
Number of BUFG/BUFGCTRLs 2 32 6%  
    Number used as BUFGs 2      
    Number used as BUFGCTRLs 0      
Number of IDELAYE2/IDELAYE2_FINEDELAYs 0 300 0%  
Number of ILOGICE2/ILOGICE3/ISERDESE2s 0 300 0%  
Number of ODELAYE2/ODELAYE2_FINEDELAYs 0      
Number of OLOGICE2/OLOGICE3/OSERDESE2s 0 300 0%  
Number of PHASER_IN/PHASER_IN_PHYs 0 24 0%  
Number of PHASER_OUT/PHASER_OUT_PHYs 0 24 0%  
Number of BSCANs 0 4 0%  
Number of BUFHCEs 0 96 0%  
Number of BUFRs 0 24 0%  
Number of CAPTUREs 0 1 0%  
Number of DNA_PORTs 0 1 0%  
Number of DSP48E1s 0 240 0%  
Number of EFUSE_USRs 0 1 0%  
Number of FRAME_ECCs 0 1 0%  
Number of IBUFDS_GTE2s 0 4 0%  
Number of ICAPs 0 2 0%  
Number of IDELAYCTRLs 0 6 0%  
Number of IN_FIFOs 0 24 0%  
Number of MMCME2_ADVs 0 6 0%  
Number of OUT_FIFOs 0 24 0%  
Number of PCIE_2_1s 0 1 0%  
Number of PHASER_REFs 0 6 0%  
Number of PHY_CONTROLs 0 6 0%  
Number of PLLE2_ADVs 0 6 0%  
Number of STARTUPs 0 1 0%  
Number of XADCs 0 1 0%  
Average Fanout of Non-Clock Nets 2.91      
 
Performance Summary [-]
Final Timing Score: 4562483 (Setup: 4562483, Hold: 0, Component Switching Limit: 0) Pinout Data: Pinout Report
Routing Results: All Signals Completely Routed Clock Data: Clock Report
Timing Constraints: X 1 Failing Constraint    
 
Detailed Reports [-]
Report NameStatusGenerated ErrorsWarningsInfos
Synthesis ReportCurrentFri 20. May 14:15:30 2016   
Translation ReportCurrentFri 20. May 14:19:44 201601 Warning (0 new)1 Info (0 new)
Map ReportCurrentFri 20. May 14:23:40 201605 Warnings (0 new)8 Infos (0 new)
Place and Route ReportCurrentFri 20. May 14:26:03 201608 Warnings (0 new)0
Power Report     
Post-PAR Static Timing ReportCurrentFri 20. May 14:26:47 2016003 Infos (0 new)
Bitgen ReportCurrentFri 20. May 14:28:15 201605 Warnings (0 new)1 Info (0 new)
 
Secondary Reports [-]
Report NameStatusGenerated
WebTalk ReportCurrentFri 20. May 14:28:16 2016
WebTalk Log FileCurrentFri 20. May 14:28:27 2016

Date Generated: 05/20/2016 - 14:59:06